The sigma-delta principle allows a realization of analog-to-digital converters with a high dynamic range in a standard MOS process without excessive component matching requirements. In sigma-delta ADC, high resolution is obtained by choosing a large ratio between the sampling frequency and the maximum input frequency and using a low-bit D/A converter and a noise shaping filter. These converters are ideal for combination with digital systems, thus sigma-delta analog-digital converters (ADC) are widely and deeply used in many VLSI applications, particularly telecommunications and audio [1]-[2]. However, these conventional sigma-delta ADC structures are all based on switched-capacitor (SC) integrators. In addition, many improved structures are also based on SC integrators to obtain different performance feature with some certain conditions. Compared to SC integrator, little attention has been paid to applying SC differentiators in delta-sigma ADC architecture. This main reason is that the monolithic switched-capacitor differentiators were proposed by [3]-[4] until recent years. New architectures of sigma-delta ADC which are based on SC delays and SC differentiators are constructed and proposed. Their basic elements, SC delays and SC differentiators are also given here. Introducing SC delay and SC differentiator circuits into sigma-delta ADC design, thus, open up many new architectures and create new circuit structures.